Extensive research and development activities have been conducted for magnetic memories, which are expected as non-volatile memories with high speed operation, large capacity and reduced power consumption. One type of the magnetic memories which have been studied most extensively in recent years is the STT-MRAM (spin transfer torque-magnetoresistive random access memory). The STT-MRAM is a magnetic memory which achieves data writing into a memory cell by using a spin transfer torque, enjoying an advantage of reduction in the write current for a reduced memory cell size. Such advantage is expected to be favorable in realizing a large memory capacity and reduced power consumption at the same time.
Unfortunately, in fact, there still remain considerable problems in meeting this expectation and achieving commercialization of a magnetic memory. One of the most significant problems is a difficulty in concurrently satisfying these three requirements: data read sensitivity, data stability and data write power (electric power consumed in a data writing operation). These three requirements are in trade-off relationship each other. Even if one or two of the three requirements is met, the other one or two requirements are sacrificed. When the MR (magnetoresistance) ratio is increased to improve the data read sensitivity and to thereby reduce the error rate in read operations, for instance, this makes it difficult to reduce the data write power required for generating a spin transfer torque. The opposite also applies. As for the relation between the data write power and data stability, the data stability increases proportionally with the magnetic anisotropy energy KuV (where Ku is the magnetic anisotropy constant and V is the volume) while the data write power also increases proportionally with the magnetic anisotropy energy KuV. Accordingly, the improvement in the data stability inevitably increases the data write power.
Another case is that if the write power for generating the spin transfer torque is decreased, this means that there is a reduced margin between the read current and the write current. This may cause a disturbance of the magnetic layer during read operation, which affects the bit error rate. Accordingly, it is very difficult to satisfy both requirements of the reduced write power and the reliable read operation.
As thus discussed, although it is possible to individually satisfy each of the above-described three requirements with the current technologies, it is difficult to satisfy the three requirements at the same time with the current technologies, due to the trade-off relationship. If a conflict between two of the three above-described requirements is resolved, this would effectively contribute commercialization of magnetic memories.
It should be noted that the following documents may disclose related magnetic memories. Applied Physics Letters 99, 063108 (2011) and Applied Physics Letters 104, 232403 (2014) disclose magnetic memories in which a piezoelectric film is coupled with a magnetic film.
U.S. Patent Application Publication No. 2013/0062714 A discloses a magnetic memory in which an MTJ (magnetic tunnel junction) is covered with a film that applies a stress to the MTJ. U.S. Patent Application Publication No. 2013/0250661 A also discloses a structure for applying a stress to a memory cell of a magnetic memory.
Japanese Patent Application Publication No. 2012-9786 A discloses a magnetic memory in which a piezoelectric body is disposed at such a position that the piezoelectric body causes a mechanical effect on a recording layer. The magnetic memory is configured to generate such a stress that the coercive force of the recording layer is reduced by applying an electric field to the piezoelectric body in recording information into the recording layer to thereby reduce a spin injection current required for the recording. This patent literature also discloses that an empty space is formed in a substrate at a position just under the main body of a memory element and a piezoelectric element.
U.S. Patent Application Publications Nos. 2012/0267735 A and 2013/0064011 A disclose magnetic memories in which a piezoelectric layer is coupled with a magnetoresistive layer to apply a stress to the magnetoresistive layer.
U.S. Patent Application Publication No. 2013/0334630 A discloses a structure in which a stress-compensating material is provided in a memory cell of a magnetic memory to reduce the net stress.
U.S. Patent Application Publication No. 2014/0197505 A discloses a magnetic shield structure used in a package accommodating a magnetic memory chip.